Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
vt depends on the body bias. change of vt by body bias is the body effect. normally we connect n-mos body to gnd and p-mos body to supply making vsb zero. if you have many nmos devices in series as in nand gate, the body of the device which is close to gnd is at 0V and other devices' body bias will 0v(gnd)+delta v
In PMOS source is connected to VDD and body is connected to VDD as well. So Vs=Vdd and Vb=Vdd. Hence Vsb = Vs -Vb = Vdd -Vdd =0. This ensures that the body effect is nullified. It has other advantages as well.