what is the best architecture to design a 8 bit 250msps dac?

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runom

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i am designing a dac with 8 bit resolution and the sampling speed is 250 msps, i am using segmented current steering architecture. is it the best or there is anything better, anybody can please suggest.
 

Re: what is the best architecture to design a 8 bit 250msps

to say something very farmly on this.....a detailed specification along with available technology etc. are needed.....

but as far as DAC is concerned....and is of 8-bit.....generally segmented architecture is the best one....as unary or binary cannot fit in ..... regarding current steering....i want to say that it is also better as switching 'current' is easier than voltage and eoorors do come pretty less.....but there may be other issues.....coming from spec or technology and device matching etc.....

gd lk

sankudey
 

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    runom

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Re: what is the best architecture to design a 8 bit 250msps

thanx for your suggestion, yes current steering segmented architecture is know doubt very good one, but i desire to search if there is any new reserch work on any better architecture or not. i hope u get my point. thank u.
 

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