what is .lib,LEF,SDC,NETLIST.V,?Plz tell me in detail and wi

[vamsi_addagada]

what is .lib,LEF,SDC,NETLIST.V,?Plz tell me in detail and with files of those?

 

[sree205]

*.lib contains the standard cell information, but only the timing information of the cells. This is used during the synthesis and STA phases.

LEF file has the physical information of the std.cells. Some lef file have the physical information of the pads as well. This file is used during the P&R section.

SDC or synopsys design constraint files are used to constraint the design. This file is used to get the netlist of the design and is further used during the P&R phase as well.

Netlist.v, as u know, is the file you get out of synthesizing the RTL file to a particular library(*.lib file).

Incase if you need any particular information about any of the files, please post the question.

 

[Amruth]

Re: what is .lib,LEF,SDC,NETLIST.V,?Plz tell me in detail an

LEF = library extraction format it also contains RC values also

SDC contains clock information,false path and multi cycle path, cap,fanout and transition values

.v is gate level net list file which is o/p from synthesis

.lib also contains power and timing look up tables

 

[kumar_eee]

Re: what is .lib,LEF,SDC,NETLIST.V,?Plz tell me in detail an

Hi Amruth, I would like to correct you..

LEF --> Library Exchange format...

not Library Extraction format..

 

[birdy123]

Hi ,

For details about the SDC, pLease cehck the following Blog.

VLSI concepts: Synopsys Design Constraints (SDC) Basics

 

[phoenixpavan]

Short and to the point...nice work by Sree....Sums up pretty well

You can mark this thread as solved I guess

*.lib contains the standard cell information, but only the timing information of the cells. This is used during the synthesis and STA phases.

LEF file has the physical information of the std.cells. Some lef file have the physical information of the pads as well. This file is used during the P&R section.

SDC or synopsys design constraint files are used to constraint the design. This file is used to get the netlist of the design and is further used during the P&R phase as well.

Netlist.v, as u know, is the file you get out of synthesizing the RTL file to a particular library(*.lib file).

Incase if you need any particular information about any of the files, please post the question.