what is ground bounce and how to elimate it?

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ground bounce means the 0V power net is not 0V in your chip/board, some noise on you power net.
using de-coupling cell in your chip
 

Ground bounce is due to rapid current sink/source thru bonding wire between ground pad and package pin. dV= L(dI/dt)
SO the methods to mitigate this ground bouncing effect are:
(1) lower the inductance(L):
for example; double/triple bonding for groung pin. or using flip-chip packaging, ...,etc.
(2) lower the current spike(dI/dt):
for example; using slew-rate control output buffer, decoupling cap in internal power-gnd net, well controlled slew-rate of internal signal with adequate buffer size, ..., etc.

Hope it helps
 
Hi,

Kindly see the attachment.

Regards,

N.Muralidhara

CRL-BEL
 

power network layout maybe import , power pad numbers also needs consideration.
 

Experience from the trenches say, the easiest way out is :

Pulling appropriate caps near the ground pins of each IC and enough provision for copper pour dedicated to ground.
 

hi murali
i didnt got any attachment from u r side. plz send me attachment

vamsi
 

Ground bounce is a phenomenon associated with transistor switching where the gate voltage can appear to be less than the local ground potential, causing the unstable operation of a logic gate.
 

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