euler path vlsi
It's a systematic design procedure...
You should check on stick diagram first. In Euler path we are conceren on the pull-up and pull down current network.
The important notation is the Vdd, input node( a,b, etc ), Output(usually denoted F) and Vss. The path should start with Vdd through all the input node to F and the went up back to Vdd in other path than before for p-mos
For n-mos, It should start from Vss through all the input node to F and then return back to Vss.
Check on books of Uyemura " Introduction to VLSi systems" or surf the internet under Euler path method. You should get the elaboration plus the diagram which will make u clear about this.