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what is difference between syntax and semantic of verilog?

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walkman

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could any one explain what is the difference between verilog syntax and verilog semantic with simple example?
 

Syntax is the formal grammar rules, expressed in Backus-Naur Form (BNF), usually listed in Annex A of the language reference manual (LRM). The BNF is used by compilers to determine what each token in the source code represents (i.e. keyword, identifier, operator, string comment). Semantics is everything else after the source code is parsed - does the compiler understand how to implement what it just parsed.

Lets say the compiler sees this piece of code in the middle of a begin/end block

A <= B + 1;

The compiler see an identifier A, followed by the operator <=, followed by another identifier B, and a semi-colon.

Syntax determines that this is a non-blocking assignment statement. The BNF rules, by position of the tokens, will deduce the '<=' operator is an assignment, not a less-than or equal to operator. The semantic rules dictate how this assignment will behave when executed, as opposed to a blocking assignment.

Syntax errors are when the compiler can't find a match in the BNF for what you wrote in your source code. If you had wrote A => B, there is no rule in the BNF that determines what that is supposed to represent.
Semantic errors are when the compiler knows what you wrote, but other rules in the LRM prevent it from being legal. For example, if it turns out that A is an automatic variable, the LRM states that you are not allowed to make non-blocking assignments to automatic variables, so you will get a semantic error.
 
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