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what is difference between STA & SSTA

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designer_ec

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Hi,
Any body explain eloboratly about difference between STA & SSTA.If any body have document please upload in this portal.Where we use SSTA.
 

hi,

STA stands for Static timing analysis
SSTA stands for Statistical STatic timing analysis.

There are so much of uncertainities happens and which we do modeling during timing analysis stages like on-chip variation, wafer variation, process variation, channel length variation, clock jitter variation, inverse temperature effect, IR drop, ....

how to ensure the timing targets?

Irrespective so much uncertainities happening during the real-time as a designer we shoud have a mechanism in place to model these uncertainities to ensure that the design will meet the timing targets.

So in order to model these uncertainities the traditional method is to add a fixed uncertainity value (usually a bigger margin) to be in the safer side and close the timing , but there is a catch this adds up in delaying tapeout or time to market.

So came the SSTA, more towards statistical or probabilistic way and models these uncertainities and achieves the timing targets.
This way we can have a meaningful uncertainity number and there by ensuring faster time to market.

happy designing.
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https://www.vlsichipdesign.com
 

statistical ta is sta (static ta) but take into considration process variation like temprature and vth variations
 

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