AFAIK the M2 is enhancement yet regardless of the pmos model I choose I always incur shoot-thru. The only things that makes any sense is either the pmos is depletion or ltspice has some bugs.
The sketched gate drive method doesn't work well for high side NMOS switches. Consider that Vgs of e.g. 10V must be applied between gate and source to turn the MOSFET fully on, not between gate and ground node.
That's why people are using bootstrap gate drivers or similar solutions.
Why does this simplified H-Bridge with swiches has shoot thru
I understand that H-Bridges need deadtime, but I dont understand why this particular very much oversimplified circuit needs any since everything is absolutely, or at least supposed to be, in phase. Even if it was a small ammount of shootthru I would still consider the circuit flawed. Large currents flow from power supply into the bridge. What needs to be done to fix this? If dead time is required to fix this, what then is the absolute simplest deadtime circuit to compliment this absolutely simple h bridge? Is it normal to have small amounts of shoot thru in all h bridge circuits?
Re: Why does this simplified H-Bridge with swiches has shoot thru
Some H bridges - and mosfet driver IC's have shoot thru, the old bjt 555 timer IC had heaps of shoot thru, the modern cmos one still has a slight amount.
Well designed power H bridges do not have shoot thru ( it makes too much RFI) - a small turn on delay is all that is needed re-think your whole approach ...
Re: Why does this simplified H-Bridge with swiches has shoot thru
Hi,
You are using a simulation software, so why don´t you do some test on your own?
Nothing will explode if you do something wrong.
****
We can´t guess how you defined the 4 voltage signals for driving the switches.
Do you understand what Vt and Vh with the switches mean?
--> Even a sheet of paper and a pencil shold be sufficient to draw the votages and timings for the switches.
Did you read some basic informations on how to drive a halfbridge? Did you understand what "deadtime" means, and what it is used for?
Your are generating control voltages with overlapping high and low signals during the 1us rise/fall time and ask why you get shoot through? That's absurd.
You should at least look at your waveforms thoroughly before posting.
That's why specialized ICs are recommended for designing full bridge topologies, such as MC33883, IRS2453(1)D, you don't have to worry about shoot throughs, as a minimum safe dead-time is guaranteed and fixed internally within these ICs
That's why specialized ICs are recommended for designing full bridge topologies, such as MC33883, IRS2453(1)D, you don't have to worry about shoot throughs, as a minimum safe dead-time is guaranteed and fixed internally within these ICs
Could not find drivers to drive p & n channel mosfets, as p channel on top and n channel to the bottom gives full supply voltage across load unlike n channel only topology.
Using a p channel and n channel combination in fact becomes easier to implement compared to all n channel mosfets
Would an Arduino based design suit you? I have designed one circuit, not sure whether I am allowed to provide the article link here or not from my website.
I am providing it for the moment, if it is against forum rules moderators can delete it anytime.
In this design you will also see how NAND gates are arranged which provides a better way of handing the input switching :
Could not find drivers to drive p & n channel mosfets, as p channel on top and n channel to the bottom gives full supply voltage across load unlike n channel only topology.
This is wrong.
It seems you didn't go through the recommended datasheets/application notes.
For sure all N-Ch half bridge circuits drive the load rail to rail...with only a minimum dropout voltage.
Most of the driver circuits use bootstrap technology to generate the drive voltage for the high side FET.
The drawback with this is that it can't drive 100% ON at the high side.
There are two possible solutions to this:
* limit the duty cycle to 98% (exact limit depends on your application parameters)
* use a DCDC power supply
Could not find drivers to drive p & n channel mosfets, as p channel on top and n channel to the bottom gives full supply voltage across load unlike n channel only topology.
Complementary MOSFET bridges are used for special applications, but not preferred for general power electronics due to the PMOS lack of performance. Respectively there are no driver ICs for complementary push-pull stages available on the market.
"Give full supply voltage across load" is no problem with NMOS H bridges that use appropriate gate drivers.