--- Don't tell me it's e@gle design. As to my experience, it's not very good for timing-critical design, maybe fit for very large design only.net_light said:I ever tried a 2M gate counts design, std-cells as 500K gates.
more than 120 ram modules. FE place only 45min and trail route spent
about 20min. RC extraction spent just several seconds. can you found any other tools that can run so fast?! this is really called high performance!! and please remember the placement has the tape-out quality. I love this tool.