Re: ATPG
pravi said:
what is ATPG and why it is needed?
what are the inputs to a ATPG tool and output of a ATPG tool?
How we can differentiate ATPG and Testbench
ATPG stand for Automatic Test Pattern Generation. It takes a gate level netlist, along with some input and output constraints, clock definitions, scan chain definitions, and generates a test pattern that can be used to find manufacturing defects in the real silicon. It also produces a fault coverage report that tells you how good your test it, and which nets are and are not covered by the test pattern.
A testbench is basically a simulation model used to simulate a design. The design can be a block, or the full chip, and the model can be behavioral, rtl, or gate. A testbench can be used for many reasons. The most common usage is a verification testbench, used to verify the correctness of the functionality of the design before taping out a chip.
A verification testbench will normally include a model of the block or chip under test, other modules or chips that drive stimulus to the chip under test, and some checker module to indicate whether the outputs behave according to specification.
You can also have a testbench that verifies the pattern produces by the ATPG tool. This testbench will normally mimic how a semiconductor tester (ATE) will sequence the test pattern into the chip under test, and check whether the outputs of the chip is identical to the expected values in the test pattern.