what does this circuit perform?

[urian]

hi,there
i am working on a full differential comparator recently.
the circuit shown below is a preamplifier of a comparator.
but i dont know how to analyze its function.
how does it perform amplifying (Vi+ - Vi-)-(Vr+ - Vr-) in the 1st stage?
any ideal?


Best regards
urian

 

[urian]

BTW
the concept diagram of this comparator given by its inventor is shown below.
i think the function of this preamplifier is (Vin+ -Vref+)-(Vref- - Vin-),which is not the right case, (Vin+ - Vin-)-(Vref+ - Vref-).
is my analysis right?

 

[steadymind]

for the first circuit shown ur output will gain*(deltaVin - deltaVref), so it does preamplify.

is this preamplifier the one used in the second conceptual picture?

 

[urian]

thanks,steadymind,
the second picture is the conceptual picture of the preamplifier.and the first picture contains the 1st and 2rd stage of the total comparator without latch which shown in the 2rd picture.

and,how do you conclude the output of the 1st circuit is gain*(deltaVin - deltaVref)?
if so,how to simulate the gain of the 1st stage in cadence?should i set the AC magnitude of all input source( ±Vin,±Vref) to 500mv,and to see the DB20(Vout+ - Vout-)?

 

[steadymind]

you can get the result by using current (id) = gm*Vgs , kcl and V = iR,

to get the working of the circuit, since this a comparator u need to setup a transient sim or a DC sweep

set Vr+ and Vr- to two differential voltages... ( let say the input CM is 1V, then u can set Vr+ 1.1 and Vr- to 0.9 to setup a differential refrence of +0.2v and -0.2V )

DC sweep ur input signal differentially from -0.4 to +0.4 about ur CM to see the comparator ouput trip and change.

u may want to ubild hystresis into ur comparator for safety from noise

 

[alvays]

Hi,

What's the use? variable Hysteresis?

 

[urian]

thanks,steadymind,i get the right result.
but why should i perform DC sweep?
i think i just need to tran sim after AC,right?
and does the function of the 2nd picture is the same as the 1st?my result is not.

to alvays,it's a preampfilier of a comparator used in the 1st 4-bit stage of a pipeline ADC without consideration of hysteresis.

 

[steadymind]

@urian - the DC sweep is to check the transistion levels and hysteresis of the comparator. u can also set up a transient sim in the same lines. setup the Vref voltages to some DC value and input to be a differential signal (sine wave for simplicity), run the transient u should expect a wave at output showing the transition levels.

4bit stage of a pipeline -- are sure about this ? that will consume a lot of power and very high specs on the amplifier.

 

[urian]

yes,steadymind,it's a 4bit-exactly 3.9b(for digital correction uesd) 1st stage of a 12b 8 stages pipelline.

the comparator used in the 1st stage above contains a static preamplifier(the first stage of the 1st picture) followed by a dynamic comparator(not shown above).

when i perform transient simulation,even though i have set all transistors working fine in DC with only common mode input, after,i use differential signal to test the logic of it,the interal nodes behave weird.
especially the drain end voltage of the tail current nmos transistor. For instance, i have set it to mirror a 50uA external current with 205mV drain voltage,when i use the differential input,its drain voltage dropped to 150mV,but the logic result is right.I wonder whether this is a problem,or I should modify it to be always around 205mV even with differential input?

 

[alvays]

Hi, urain

If vin- and vref- are all low potential, then the source of input will be low. Only if they are still in saturation