matrixofdynamism
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What does the term "corner case" refer to when it comes to design verification?
I am aware of the term corner when it comes to static timing analysis. We find the combination of process, temperature and voltage which shall produce the fastest circuit and the combination which shall produce the slowest circuit. We then find out the propagation delays across paths and through cells for these two corners and calculate the slack for setup and hold time.
I have come across a document on SystemVerilog which states: "Before you write the first line of test code, you need to anticipate what are the key
design features, corner cases, and possible failure modes."
I do not understand what does corner case refer to here since this is not timing analysis, rather it is something different.
I am aware of the term corner when it comes to static timing analysis. We find the combination of process, temperature and voltage which shall produce the fastest circuit and the combination which shall produce the slowest circuit. We then find out the propagation delays across paths and through cells for these two corners and calculate the slack for setup and hold time.
I have come across a document on SystemVerilog which states: "Before you write the first line of test code, you need to anticipate what are the key
design features, corner cases, and possible failure modes."
I do not understand what does corner case refer to here since this is not timing analysis, rather it is something different.