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It basically tells you the response time. The net delay caused by the device itself....rather than your logic.
In case of Xilinx FPGA the more -ve the value the faster the device.
-5 is faster than -4 device ...so on so forth.
It basically tells you the response time. The net delay caused by the device itself....rather than your logic.
In case of Xilinx FPGA the more -ve the value the faster the device.
-5 is faster than -4 device ...so on so forth.
I agree that this is a propagation time... but I have seen in some app notes, that this time is given in ns, for example, -5 = 5 ns, -4 = 4ns, so I don't think that -5 is faster than -4 speed grade.
SPEED GRADE .??
I WONDER IF WITH FPGAS is like with CPUs ..The MANUFACTURE process is the same for ALL but they only determine the speed rating with a TEST for a particuliar DEVICE .
INSTEAD of having 3 PRODUCTION CHAINS .devoted to the same PART !!!!
I believe that the difference between speed grades lies mainly in the packaging, for example a -6 speed grade must be determined within some package,
although the die is the same however the prices may vary significantly with higher speed grades.
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