Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Verification process requries .
Verifiaction behaviour models models
bench
and test cases
IN other words it can be said that designing a Test Becch and building high levels trasactors over the behavioral models such that the test cases can be written in efficent way. The becn can also include iuntergrated monotirs and checkers using assertions and other house keeping modules
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
