Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
in microprocessors there are two type of caches L1 and L2. L2 is very larger then L1 .cpu first search in L1 if there is not the data in L1 it then search in L2 and if there is not it search in memory and ....but there is another architecture exist for cache named Trace cache.search for it in google and if u want I can send u some articles about it.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
