What are the timing parameters related to PLD?

[seemagoyal44]

what are timing parameters -clock to output delay and system clock to system clock delay related to PLD

 

[xstal]

Re: timing paramter

Clk-to Output delay is the sum of Clk-to-Q delay and Q to Output delay.

 

[gck]

Re: timing paramter

Clock to output delay is sum of greater(hold time, clk to Q) and combination delay between Q to output.

I am not sure about the system clock to system clock delay.
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