Re: ASIC Design Flow
ASIC Design flow includes the follwoing steps:
1. Design entry : Enter the design into an ASIC design system, i.e understand the design as
Full-Custom ASICs
Standard-Cell-Based ASICs
Gate-Array-Based ASICs
Channeled Gate Array
Channelless Gate Array
Structured Gate Array
Programmable Logic Devices
Field-Programmable Gate Array
2: ) Logic synthesis : Produce a netlist. : - a netlist is defined as the various interconnections well defined.
3: ) System partitioning : Divide a large system into ASIC-sized pieces.
4: ) Prelayout simulation : If the design functions correctly.
5: ) Floorplanning : Arrange the blocks of the netlist on the chip.
6: ) Placement : Decide the locations of cells iin a block.
7: ) Routing : Make the connections between cells and blocks.
8: ) Circuit Extraction : Determine the resistance and capacitance of the interconnection.
9: ) Postlayout simulation. Check to see the design still works with the added loads of the interconnect.
Ive attached a detailed document regarding ASIC Basics and DESIGN Flow
Hope its useful for u
with regards