What are the different ways to overcome Setup and Hold violation in a flip flop?

[research_vlsi]

Hi all

what r the different ways to overcome setup and Hold violation in a flip flop?

 

[deh_fuhrer]

Re: Setup and Hold

-- Avoid clock skew as much as possible........

 

[badola]

Re: Setup and Hold

check this

 

[research_vlsi]

Re: Setup and Hold

thank u guys..

 

[badola]

Re: Setup and Hold

check this ppt...good one

 

[verilog.course]

Re: Setup and Hold

check this ppf hope it will help

 

[gurpreet.singh]

Re: Setup and Hold

HI
According to me we can remove set up violation by changing the time period/frequency of the system because in set up time our main requirement is that our arrival time should be< require time so we can adjust that by changing frequency or time period.But Hold violations are very dangerous because in hold time our main requirement is arrival time should be> require time so we can give delay in the circuit by inserting a flop in the circuit but we cann't stop the clock to reach later in the circuit.