fpga123
Junior Member level 1
learn asic
now i am finishing one design verification on FPGA.
i want to go on with this ASIC design.
somebody could tell me, how to begin it!?
what is the design flow? which tool is used?
thx!
green hand
now i am finishing one design verification on FPGA.
i want to go on with this ASIC design.
somebody could tell me, how to begin it!?
what is the design flow? which tool is used?
thx!
green hand