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want to know how to convert verilog netlist to spice netlist

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likun0427

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spice netlist is required when using powermill(synopsys) to analyze power of the chip.
in Calibre, one command v2lvs is one way.
in panda, one command ver2cdl is another way to convert.

but, top module of the verilog netlist includes some IP which has no spice.

thanks for your suggestion!
 

jackson_peng

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for those IP which has no spice, use Herculus to extract the spice netlist from GDSII first
 

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