[SOLVED] Want to know details of LPC2148 PLL

[nikhillife11]

Hey All,

I need your help. I am currently working on LPC2148 and trying to write my program for LCD. I googled some pages and came accros a common function for initializing PLL of LPC2148

But my question is.... If i am using a 12 MHZ crystal at the xtal1 and xtal2 pin of LPC2148,what will the CPU clock be and Peripheral clock be from below function

void clkinit(void)
{

PLL0CFG=0x24;
PLL0FEED=0xAA;
PLL0FEED=0x55;
PLL0CON=0x01;
PLL0FEED=0xAA;
PLL0FEED=0x55;
while(!(PLL0STAT & PLOCK));
PLL0CON=0x03;
PLL0FEED=0xAA;
PLL0FEED=0x55;
MAMCR=0x02; // why this initialization
MAMTIM=0x04; // Again why this one
VPBDIV=0x01;

}

I need to know my CPU and Peripheral clock to calculate the approx. delay.

So pl. help me out friends

thanks

Nikhil

 

[bigdogguru]

I need your help. I am currently working on LPC2148 and trying to write my program for LCD. I googled some pages and came accros a common function for initializing PLL of LPC2148

But my question is.... If i am using a 12 MHZ crystal at the xtal1 and xtal2 pin of LPC2148,what will the CPU clock be and Peripheral clock be from below function

void clkinit(void)
{

PLL0CFG=0x24;
PLL0FEED=0xAA;
PLL0FEED=0x55;
PLL0CON=0x01;
PLL0FEED=0xAA;
PLL0FEED=0x55;
while(!(PLL0STAT & PLOCK));
PLL0CON=0x03;
PLL0FEED=0xAA;
PLL0FEED=0x55;
MAMCR=0x02; // why this initialization
MAMTIM=0x04; // Again why this one
VPBDIV=0x01;

}

I need to know my CPU and Peripheral clock to calculate the approx. delay.

Fosc = 12MHz

MSEL bits (00100) -> Value of M = 5

PSEL bits (01) -> Value of P = 2

The above values load into PLL0CFG=0x24

Therefore:

CCLK = 60MHz

Fcco = 240MHz



If VPBDIV = 1, then the core clock CCLK = PCLK the peripheral clock.

PCLK = 60MHz

Concerning the following parameters:

MAMCR=0x02; // enables memory accelerator module
MAMTIM=0x04; // configures MAM fetch cycles

You can find additional information relevant to the LPC2148 and PLL configuration in the following documents:

Getting Top Performance from NXP's LPC Processors

Clocking ARM with Crystal oscillator and PLL

BigDog

 

[nikhillife11]

Fosc = 12MHz

MSEL bits (00100) -> Value of M = 5

PSEL bits (01) -> Value of P = 2

The above values load into PLL0CFG=0x24

Therefore:

CCLK = 60MHz

Fcco = 240MHz

View attachment 66052

If VPBDIV = 1, then the core clock CCLK = PCLK the peripheral clock.

PCLK = 60MHz

Concerning the following parameters:

MAMCR=0x02; // enables memory accelerator module
MAMTIM=0x04; // configures MAM fetch cycles

You can find additional information relevant to the LPC2148 and PLL configuration in the following documents:

Getting Top Performance from NXP's LPC Processors

Clocking ARM with Crystal oscillator and PLL

BigDog

Hello BigDog,

I just dint understand those memory accelerator module, So do you have any specific document to elaborate MAM and make it simple to understand.

Please help

Thanks

Nikhil

 

[bigdogguru]

I just dint understand those memory accelerator module, So do you have any specific document to elaborate MAM and make it simple to understand.

Sure.

The Memory Accelerator Module (MAM) is essential a cache system used to bridge the gap between the speed limitation of Flash Memory and the much higher clock frequencies of the ARM7TDMI Core.

Due to system startup and boot requirements, the MAM as with most caching systems is disabled on reset. Therefore to run the ARM7TDMI core at a much higher clock frequency than the Flash Memory can be accessed, the MAM or other cache system must be enabled as well.

LPC2000 MCU memory acceleration module









Peripheral Simulation For NXP (founded by Philips) LPC2148 — Memory Accelerator Module (MAM)

Hope these links and PDFs help your understanding.

BigDog