"wait for" statement inside process with a sensiti

[carbon9]

Hi all,

I've trying to simulate a simple state machine with VHDL code below:

library ieee;
use ieee.std_logic_1164.all;

entity p82 is

	port(a, c, clk, rst: in std_logic;
		 x: out std_logic);
end p82;

architecture behavior of p82 is
		
type state is (stateA, stateB);
signal pr_state, nx_state: state;

begin

-----Lower Section--------

	process(rst, clk)
	begin
		if(rst='1') then
			pr_state<=stateA;
		elsif(clk'event and clk='1') then
			pr_state<=nx_state;
		end if;
	end process;

---Upper Section----------

	process(a, c, pr_state)
	begin
		
		case pr_state is
			
			when stateA =>
				x<=a;
				wait for 10ns;-->ERROR
				x<=c;
				nx_state<=stateB;
							
			when stateB =>
				x<=c;
				wait for 10ns;--->ERROR
				x<=a;
				nx_state<=stateA;
		
		end case;
	
	end process;

end behavior;

But, the compiler gives error: "A wait statement is illegal for a process with a sensitivity list." But I need to make delays on those points. How can I solve this problem?

Regards

 

[amitgangwar_vlsi]

Re: "wait for" statement inside process with a sen

you can use either sensitivity list or wait statement within a process only....

 

[carbon9]

Re: "wait for" statement inside process with a sen

Thanks for the reply. OK, how can I make a time delay inside a process other than using a wait for statement?

Regards

 

[amitgangwar_vlsi]

Re: "wait for" statement inside process with a sen

try AFTER statement.......... i m not sure but try this....

 

[carbon9]

Re: "wait for" statement inside process with a sen

Thank you. It works.

 

[FvM]

Re: "wait for" statement inside process with a sen

VHDL rules don't allow your construct, cause it doesn't define an unequivocal behaviour to my opinion. There are two ambiguous aspects: what should start the wait interval? If you expect, that a change of pr_state starts the interval, what should happen, if pr_state changes a new while wait is still active? VHDL requires defined behaviour in this place.

If I guessed right, a wait until pr_state = nx_state; before the case block would basically achieve the intended behaviour without a sensitivity list.

 

[carbon9]

Re: "wait for" statement inside process with a sen

Simply

x<=a after 10ns;

solved the problem in simulations. Of course I think this is not synthesizable.

Regard

 

[karikalan_t79]

Re: "wait for" statement inside process with a sen

if you need delay, best use multiple dff in seiral fasihon to achive the same

 

[carbon9]

thanks.