danda821
Full Member level 2
voltage controlled capacitor verilog a
Does anyone know how to add a voltage-controlled cap in Cadence IC? I found a vccap model in analogLIb, but it can be only used in HspiceS. I want to use spectre simulator. Do I need to use Verilog-A or spectreHDL to model the device? Thank you.
Does anyone know how to add a voltage-controlled cap in Cadence IC? I found a vccap model in analogLIb, but it can be only used in HspiceS. I want to use spectre simulator. Do I need to use Verilog-A or spectreHDL to model the device? Thank you.