vlsi design..................asic deign

[gandhipathik]

hello

what is floorplanning? how it is to be done??

when we write code for full adder, then how will synthesis and floorplanning result look like?

 

[cks3976]

Floor planning include the following activities : planning the placement of physical functional blocks in the chip, routing the input & output ports of these blocks to suitable I/O pins; Planning the number of Power & Ground pins ; Designing the Power and Clock Trees.

Any logoc element will just look like "BARs" of silicon, interconnected to I/O pads through wire bonds. I suggest read Neil & Morris : https://www.amazon.com/CMOS-VLSI-Design-Circuits-Perspective/dp/0321149017 for understanding these fundamentals better.

Hope this helps.