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VLSI Architectures open problems

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vreg

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Hi,
Can someone suggest any open design problems in vlsi architectures that can lead to publishable results - for example any optimizations that can be done in existing implementation of a specific protocol, open issues to solve, etc...
I want to code in verilog and synthesize the complete circuit.
(must be completable in 3-4 months span)

Thanks...
 

If it's an open problem it usually means it's difficult, so.... 3-4 months is hard to say.

suggestions:

- Non Von-Neuman architectures: Analog computing, Neuromorphic
- Scheduling ... always a problem, never a solution
- Low Power / Low Energy ... think of it as more battery
- Probabilistic computing
- Adiabatic computing
- Reliability --- Recover from soft and hard errors, including checkpointing, redudancy
- Security and trustworthiness: How do you know that a chip does what it's supposed to do?
- Testing: How to test a circuit after completition very efficiently
- System level design: People care too much about the microprocessor, but what about the north-bridge, the memory interface, SerDES and so on
- Quantum computing ... of course
- Human Computer Interaction...
- Architecture specific to computer analytic: Bloomcam filters, fasth caches, and so on.

PFFF many other ideas


Ask your advisor to give you ideas... that's THEIR JOB DESCRIPTION
 
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    vreg

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There is always something to improve...as in life philosophically speaking... Pick a topic to analyze and see what can be done to improve..... I saw recent phd thesis on pass transistor logic design implementation.... it is dead design style ......
the only thing is don't pick a topic like "improving steam railway engines" when it has been decommissioned for so long....
 

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