The question title seems to miss the problem. A low power processor probably doesn't necessarily need vias in the exposed pad, although it's surely advantageous to improve EMI behaviour. But other ICs with similar footprint are required to have vias. If it's possible with the latter, it can be done for PIC as well.
Exposed pads are usually connected by vias. You know that optimal design of vias in pad has been often discussed at Edaboard. Without repeating previous discussions and the reasoning given therein, I can tell you that I use open vias (e.g. 0.3 mm) for most designs and either simple non-conductive plugged vias or sophisticated VIPPO technology (via in pad plated over) in special cases.