pin-level vhdl code
First of all - YOUR POST IS ABOUT DIGITAL, not ANALOG. Get your posting right and don't cross-post.
Now let me think. I did this once but I used Symplicity to compile to gates and output EDIF. Then, import EDIF into the LED SPR and run using a tdb file of standard cells.
But you are right - getting a SYN file for your TDB is the hardest part. What you need to do is write a LIB file, then use LIB2SYN to generate a SYN file. Oh the joys I had writing that massive LIB by hand. And you will too!
So go find the generic scn06hp.lib or any generic lib file you have, and begin reading and understanding the function of all the statements. Then, it just takes time to make a file that is appropriate for your own library.
It's a shame that it wants so much timing and other information. To me with my small SPR blocks I don't need that stuff. My process runs at 2GHz and my clock is 10MHz - haha so what do I care about delay? Your mileage may vary.
Here is an example of an inverter from a generic LIB file cut down to the minimum. I wish it was just pin description and "function" but you can get the idea.
/**************************************************************************/
/* INV */
/**************************************************************************/
cell( INV ) {
/* cell level simple attributes */
area : 340.2;
cell_footprint : "inv";
/* pin groups in the cell */
pin( A ) {
/* pin level simple attributes */
direction : input;
capacitance : 1;
} /* pin( A ) */
pin( Out ) {
/* pin level simple attributes */
direction : output;
function : "!A";
/* timing group within the pin level */
timing() {
/* timing level simple attributes */
related_pin : "A";
intrinsic_rise : 0.135;
intrinsic_fall : 0.142;
rise_resistance : 0.421;
fall_resistance : 0.428;
} /* timing() */
} /* pin( Out ) */
} /* cell( INV ) */