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If you are generally interested in high-level languages, Xilinx has a tool called Forge which can generate FPGA implementations starting from Java behavioral descriptions. It is 50MB and it runs on Windows and SPARC Solaris. You will also need the implementation tools (ISE) from Xilinx to construct complete, top-down designs. I have not tested the tool but last week I downloaded it for evaluation. You will find it in Xilinx's web page.