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data_in : INOUT STD_LOGIC_VECTOR(7 downto 0) signal data : STD_LOGIC_VECTOR(7 downto 0);
Is it normal that the following instruction : data<=data_in; results in a forcing unknown state for data if data_in is in Hi-Z state and data all 0?
The following instructions seems to solve the problem in simulation but I don't know if an Hi-Z state can be detected in hardware?
IF (data_in/="ZZZZZZZZ") THEN data<=data_in; END IF;
If not what could be the solution?
Thanks a lot.