[VHDL] How to do forwardtrace/backtrace in VHDL?

[maulin sheth]

Hello ALl,

Can any one help to understand of how to do forward trace / back trace in the VHDL RTL coding. In which RTL is containing Entity, Architecture and Configuration (with for loop for instantiation)

Thanks a lot in advance.

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Thanks & Regards,
Maulin Sheth

 

[shaiko]

What do you mean by forward trace / back trace ?

 

[dpaul]

Can any one help to understand of how to do forward trace / back trace in the VHDL RTL coding.

What is that?

As a general guideline, I can suggest you to refer to the design spec. which might might contain an architectural block diagram or a state diagram! After that try to follow the RTL.