VHDL code to interface FPGA & MAX3223

[diganth]

i m using MAX3223 to interface FPGA & DB9 connector. Now i need to write the VHDL code for MAX3223 & FPGA interface. I dont know which pin in MAX3223 tells when to transmit & receive?... So plz help me in this regard so that it will be easy for me to write the code..

 

[wtr]

I just pulled up the data sheet from Texas instrument [https://www.ti.com/lit/ds/slls409k/slls409k.pdf]
It appears that there are seperate lines for transmit/recieve. Meaning your fpga device should have seperate pins for pin on the MAX3223 device.
In other words you could do both tx & Rx at the same time.
You can control the autopower feature to awaken on a valid recieve, you can control the enable pin.
Regards,
Wes