Non AMP

vhdl basics on declaration

Thread starter royalreddy
Start date Apr 4, 2012

Status: Not open for further replies.

Apr 4, 2012

#1

R

royalreddy

Newbie level 5

a :in bit;
d: in c;

1st a is of type bit, what is 2nd statement meaning?

Apr 4, 2012

#2

FvM

Super Moderator

Staff member

You need to refer to libraries and package imports preceeding the said port declaration. Any non-standard type name must be declared therein.

Status: Not open for further replies.

Similar threads

I
concatenation in VHDL?
- Started by irfanraina1@123
- Feb 27, 2024
- Replies: 2
PLD, SPLD, GAL, CPLD, FPGA Design
Declaration of a constant that chooses among other constants of different sizes in vhdl
- Started by rafimiet
- Feb 2, 2023
- Replies: 10
PLD, SPLD, GAL, CPLD, FPGA Design
N
Add EMIF IP to VHDL code
- Started by nelky22
- Mar 16, 2024
- Replies: 5
PLD, SPLD, GAL, CPLD, FPGA Design
L
Image Encryption and Decryption using VHDL
- Started by Lightning89
- Feb 14, 2024
- Replies: 0
PLD, SPLD, GAL, CPLD, FPGA Design
V
[SOLVED] Multiplier on VHDL explanation
- Started by Vhdlontherise
- Mar 2, 2023
- Replies: 5
PLD, SPLD, GAL, CPLD, FPGA Design