very low current comparator please help

[choodzik]

hello everybody

My name is Peter and i am a student. My engineer degree subject is to compare and design few architectures of voltage comparators. Which of them takes less current works faster etc.

these are the needs of the comparator:

- voltage offset less then 5mv
- frequency 50khz - 2 Mhz
- very low current consumption ( comparator should take single mikro-ampers )
- maksimum time for the output answer is the 25% of clock frequency
- comparator should be loaded with 100fF capacitance

I would like to ask you about some papers and help for me. Maybe you have similar problem in the past or you designed some comparators.


Another thing is that i designed a open loop comparator. It is preety fast and takes only 1 uA. But the problem is that i only cannot take normal clock signal ( i mean high and low voltage level of clock signal is 50% of period so k=1/2 )

In my design i use not normal clock signal
for ex. high level is 0.06 us when period is 0.5 us

So my question is how to design some circuit which will divide me the frequency of the clock. I just want to make clock signal with the frequency from 50 khz - 2 Mhz
but the high level will be about 10% of period not 50% as it is usual. I know there are some frequency dividers etc. but i takes usually much current consumption so i cannot use it in my uA comparator.

Another question is how to measure voltage offset of the comparator in the hspice??

I am new on this forum so i don't have any points allready but i would apreciate for every help and papers from you. my mail p_bejm@o2.pl

thanks in advance

 

[ithink]

here i have a little advice to you about power consumption. u can add more switch transistor, when the circuit works, all swich is open; however ,when the circuit don't work, all the switch is closed,then all the circuit will have lower power.i have designed a rtc chip,which has 1ua power.

 

[arsenal]

hi choodzik,
i think u can try regenerative comparator, since the static power consumption can be pretty low and speed of 2Mhz will not be any issue.

 

[harrytrinh]

1. In order to generate divider frequency that no burn in supply current you could use flipflop and some logic gate.It is easy to generate 12.5% duty using flip flop.
2.In order to measure the voltage offset in spice simulation you can use:
1/ Run AC simulation and see the different between the inputs.
2/ Or use can use negative feedback and see the different between the inputs
3/ You also could use transition simulation. But you need increase the input very slow to ignore the effect of the delay of the circuit.
Goodluck

 

[choodzik]

thanks for your help
but can help me once again

my first thought was to change duty ratio to about 1/8 and it really works (the answer is stable in about 20% of clock period) but comparator should be optimized for the lowest power disspation so the current consumption of the circuit which is changing clock duty ratio is added to total power disspation of the all comparator circuit

so my question is do you know some other technics to solve this problem

how to make fast answer of the comparator without
getting worse the total power disspation of the circuit...

o don't know maybe i should think about some analog comparator with high gain amplifier before the latch??

 

[PaulHolland]

Hi, The comperator build-in the PIC12F629 is very low current, thought less than 1 uA !!!. and fast few MHz.

Paul.

 

[choodzik]

is it possible to get schematic of this comprator??

 

[cinch]

Hi Choodzik
u can use 2- stage comparator with first stage being cross-soupled architecture. That works really well. U can bias the first stage tain current from 1uA to 3uA to get best results. Cross- coupled architecture works at high speed, also gives accurate results.