omara007
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autoinst emacs verilog
Hi Guys ..
Is there a way to echo the changes in a sub-module interface to the top-level module using Emacs running in Verilog-Mode ?
In other words, if I have sub-module X, with 10 input ports and 10 output ports .. instantiated in a higher level module Y (top-level module) .. and I wanted to add a new input/output port, or change the size of one of the original ports in module X .. can I reflect these changes automatically to the Y module ? .. something like AUTOs ?
Hi Guys ..
Is there a way to echo the changes in a sub-module interface to the top-level module using Emacs running in Verilog-Mode ?
In other words, if I have sub-module X, with 10 input ports and 10 output ports .. instantiated in a higher level module Y (top-level module) .. and I wanted to add a new input/output port, or change the size of one of the original ports in module X .. can I reflect these changes automatically to the Y module ? .. something like AUTOs ?