[SOLVED] verilog: how to find max value in the bus

[miskod]

Please help me...I'm fighting with following problem in the simulation testbench:
I have bus of 32*10bit values: ix_puldata[319:0]. I need to find maximum value in this bus. I use following code enclosed in the task:

integer j;
….
for(j=0;j<32;j=j+1)
if(top_inst.core.subsystem.ixpul_data[((j+1)*10)-1j*10)] > ix_pul_max)
ix_pul_max = top_inst.core.subsystem.ixpul_data[((j+1)*10)-1j*10)];

What I get is “Illegal operand for constant expression” everywhere I use “j” integer in array position.
I can imagine, that such code is not synthesizable, but I don’t see reason why it generate error in simulation.
Please, help me to find max value there...

 

[dave_59]

Verilog requires that slices of bit vectors have constant width. Even though you could prove the range of your simple case has a constant width of 10, Verilog does not allow that syntax.

Use the +: range construct. See https://electronics.stackexchange.com/questions/74277/what-is-this-operator-called-as-in-verilog