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Verilog code to be converted to logic curcuit (gates level)

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Dino1400

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Hi, I have a Verilog code that wrote using ModelSim now I need to do the layout of the controller, I tried to use K-maps but it gets very complicated due the number of sates and inputs. Any idea in how to generate the logic circuit design (gates and flip-flops) without doing K-maps just from the Verilog code
 

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