Verilog code generator for CRC calculation for polynomials

[tomash1885]

Hi,

I'm looking for Verilog code for crc calculations for the CRC16-CCITT polynomial

g(x) = x^16 + x^12 + x^5+ 1

My input data width is 112.

Can any one help?

Thanks

 

[andre_luis]

This task isn't difficult, even for a beginner level, it's just a delayed sum.
What have you made so far to code and simulate that ?

 

[tomash1885]

Thanks Andre,

Actually, CRC is quite new to me. I understand the basics but I'm not quite sure how to translate it to Verilog code consisted of xor gates and flipflops. I saw only 1 article which kind of explains it (http://outputlogic.com/my-stuff/parallel_crc_generator_whitepaper.pdf)
but it's not exactly what I need.

Is there a simple way to write this code without making lots of iterations?
CRC isn't my focus in my project so if there is a good code generator or even calculator of the CRC bits (as function of the the input data bits for the CCITT polynomial) it'll be enough.

I'd appreciate for any help.
Tomer

 

[andre_luis]

Is there a simple way to write this code without making lots of iterations?

If you have the data already stored anywhere, in fact you could make it in a parallel implementation, which would require much more hardware resources to be synthesized. Take a look here: https://www.asic-world.com/examples/verilog/parallel_crc.html

 

[vGoodtimes]

the same website has a generator: http://outputlogic.com/?page_id=321