Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Verilog-A code for a clock source with jitter

Status
Not open for further replies.

zanbaghi

Newbie level 1
Joined
Aug 8, 2009
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Corvallis-OR
Activity points
1,285
jitter clock source code

Dear friends,

I have designed a CT sigma delta modulator. I need to have clock source with jitter effect in spectre. Would you help me to write a verilog-A code to model the clock source with the frequency of 240 MHz and rms jitter of 3.6ps?

Ramin.
 

Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top