Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Vdd min = Vt,n + |Vt,p| ?

Status
Not open for further replies.

kweijun

Newbie level 3
Joined
Sep 12, 2005
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Penang, Malaysia
Activity points
1,304
I've read this in a CMOS book. It stated that the minimum supply voltage, Vdd min, in order for a CMOS inverter to work is equal to nMOS threshold voltage, Vt,n + pMOS threshold voltage, Vt,p.

The question is,
Since only one of the MOS in a CMOS inverter will conduct at one time, the Vdd min should be ≥ Vt,n right?

Please advise. Thanks
 

jackson_peng

Full Member level 2
Joined
Apr 11, 2005
Messages
141
Helped
23
Reputation
46
Reaction score
9
Trophy points
1,298
Location
Shanghai, China
Activity points
2,380
at least one MOSFET should work in linear region, otherwise how could it recognize the output logic value.
so the miminum value is right.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top