VDD independent digital temperature sensor

[IADanilov]

Hello!

I have designed and tested digital temperature sensor based on time-to-digital conversion. It has showed good result, but I'm concerned with output singal's VDD dependence.

I'm designing a new version of that sensor now, and the main goal is to achieve independence from power supply (in range 0.9 ... 1.1 V; standard VDD = 1.0 V).

I think there are two ways:

1. LDO.
2. Power supply sensor.

The second way is, in my opinion, more complex

Are there any univarsally adopted ways to overcome this problem?

Thanks.

 

[IADanilov]

So, nobody knows?

 

[zsolt1]

hi,
as i understand you have a sensor (?) that has the dependency Uout = f (t) and that sensor (or measuring circuit ?) is supplied with VDD , and your worry is that the system could be Uout = f (Vdd ( f (t) ) ) ? :?:
Then try to stabilize VDD , than your system will became Uout = f (t)|at VDD = ct.

- - - Updated - - -

Ps : you can use the PN junction of a diode ..............

 

[IADanilov]

Hi,
Yes, you understood correctly. I have temperature sensor with digital output.
Output function is (simplified):

Out = c1*T+c2*Vdd,

where c1, c2 - constants, T - temperature. But it should be: Out = c1*T (no dependence on VDD)

As I said earlier, I see two ways to solve this problem:

1. Stablize VDD by LDO or make the temperature sensor independent from VDD by design.
2. Design and use power supply sensor to obtain VDD value (generally we don't know it) for proper calibration of temperature sensror.

First way is simpler, in my opinion.

I'd like to know are there any univarsally adopted ways to overcome this problem? Maybe somebody faced such a problem and successfully solved it?

P.S. PN junction of diode will not help in my design .

 

[zsolt1]

personally i used a thermistor in a voltage divider configuration . The divider was supplied by a parallel stabilizer (using a 3 V zenner and series rezistor), The output of the measuring circuit was feed directly in to a PIC's ADC, implementing a bipozitional PID regulator (heating and cooling) . After calibration i never observed irregularity's (at all) given by Vdd (5 V in my case)

 

[FvM]

P.S. PN junction of diode will not help in my design

You didn't mention your available IC technology at all. How do you expect meaningful answers?

 

[IADanilov]

You didn't mention your available IC technology at all. How do you expect meaningful answers?

My fail. Techology is 65 nm CMOS.

 

[zsolt1]

if you are using special IC 's , Vdd should not be a problem, all most all Ic's have internal power suply .... I think you should search the problem that you encounter on other directions after you exactly identify the phenomenon.......

 

[IADanilov]

Thanks for your advice.