VCO output buffer design

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rty94

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Hello,
I am designing a quadrature VCO at 5-6.5 GHz and now I am trying to figure out which is the best way to design my output buffers. I have tried several topologies but nothing really works sufficiently. Which is the best methodology to do so?

Thanks in advance guys!
 

Best is more research. 5GHz VCO is a serious circuit, if you don't find a good solution from an article or a book, I think it has a low chance someone will share with you a tried and trustable circuit.
If you show a bit more efforts, results with detailed issues it would be easier to help. I love these kind of free questions, where the answer could mean thousands of dollars.
 

What is the problem with buffers you've tried already?
 

You should amplify your VCOs signal ( less load effect-higher isolation) then design a Emitter/Source Follower ( low output impedance ) to drive the other blocks.
This is very classical buffer topology.
 
Actually what I need is to make a square wave at the output as it's gonna be used for pll application.. I have tried already a comparator topologies but it doesn't work..
 

Actually what I need is to make a square wave at the output as it's gonna be used for pll application.. I have tried already a comparator topologies but it doesn't work..
Research "Cherry-Hooper" circuit for that purpose..
 

square wave at the output

This implies a sudden transition, and immediate flow of current through devices. 5 GHz requires very rapid On-Off switching. Slew rate can be hampered by capacitive or inductive reactance. Or by a large number of components in the path.

As an experiment, try installing a series capacitor which acts as a differentiator. The output is spikes. Mix through a potentiometer with the original signal, and the result should be quicker up-down transitions. It's a 'kludgey' concept which works in simulation. I could be all wet.
 

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