Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Variation in inferring EBRs for different memory dimensions.

Status
Not open for further replies.

veeraj_patil

Newbie level 5
Newbie level 5
Joined
Jun 8, 2013
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Location
Bangalore,India
Visit site
Activity points
57
When I synthesize a 16K X 64 bit Dual port RAM, the synthesis tool infers 64 (16K)EBRs (1 bit data width for each EBR). But when I synthesize 16K X 128 bit Memory, the tool is inferring 120 EBRs(112 EBRs of 18K and 8 EBRs of 4K).

Why this variation for 16K x 128, where ideally it should infer 128 EBRs like it did for 16K x 64. ?
 

What is this EBR you speak of?

BRAMs and altsyncrams are usually optimised for 9 bit or 18 bit dwords.
 

EBR (Embedded block ram) is a BRAM. If they are optimised for 9bit then it should take anywhere in between 1 to 9 bits as data width and even then it is possible to have 128 EBRs (16k x 1).
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top