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Using FPGA to interface SRAM to microcontroller

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kappa_am

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Hi all,
I am a power engineer, so this question may seem rookie. Today I tear down a drive system, I found it in the control section they use an FPGA (Lattice) to connect an SRAM (IS61WV25616BLL/BLS) to their MCU (TMS320). Let alone why they ran out of ram for a drive system which itself seems strange. I am wondering what does FPGA do? could not they use PMP to connect Ram directly to MCU?

Thank you for sharing info
 

KlausST

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Hi,

There are really many possible reasons.

I relatively often use PLDs, external SRAMs and microcontroller in combination.
Not the brands that you talk about.

In one application I divided the SRAM in different sections:
* general use SRAM
* send buffer
* 2 receive buffers.
The FPGA autonomically controls a DAC... reading the "send buffer" and transferring the data to the DAC.
At the same time it samples the analog input with the use of an ADC and transfers the data into one receive buffer.
At the same time the microcontroller performs an FFT calculation on the other receive buffer data.
Automatically the two receive buffers are switched every time the buffer is full.
The PLD controls an interrupt line to inform the microcontroller that new data is ready to process.
The used SRAM was fast enough to perform a DMA read/write (ADC, DAC data transfer) within two microcontroller SRAM accesses.
Thus I completely avoided access collision problems.

All the timing control, address line manipulation, DMA style SRAM access, generating ADC and DAC control lines is done within the PLD...the microcontroller even does not know that there exist two receive buffers...

This is just one example out of many...

*****
Some ideas, especially with "power applications"
* sinwave table in SRAM
* automatically generate 6 PWM signals fir a three phase power application
* fast overcurrent detection
* automatic inverter output voltage regulation
...and so on could be implemented in the FPGA with the use of SRAM data.
All could be performed with about no microcontroller processing power.


Klaus
 

kappa_am

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I implemented the same drive system using dsPIC, actually, lots of memory left unused. The only difference is that mine does not have EtherCAT. It seems strange to me to run out of memory, and add about 15 bucks to the BOM cost!

Thank you for taking your time and illustrating this subject for me.
 

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