user selectable n bit counter

[djstar]

Hi,

I'm an analogue engineer with no expeirnce in VHDL so i've grabbed a couple of books from the library and borrowed a terasic DE0 board to have a play around with.

What I fundamentally want to do at this stage is to have a input pulse which is coming from a de bounced push button switch. On every rising edge of the switch the counter will increase by 1 until it reaches a set number which will be user selectable from the 10 toggle switches. Once the count is equal to this number a 100 ns pulse will be outputted to a output pin and the counter will reset and start again. it is basically scaling down a signal to a user defined ratio such as for every 8 pulse output 1 pulse.

I am not after the answer because i wont learn any thing, but rather a bit of a steer in the right direction, i've tried getting my head around some examples of VHDL counters but at this stage it is getting a bit confusing.

Any help would be greatly appreciated.

liam

 

[aruipksni]

Hi,

I'm an analogue engineer with no expeirnce in VHDL so i've grabbed a couple of books from the library and borrowed a terasic DE0 board to have a play around with.

What I fundamentally want to do at this stage is to have a input pulse which is coming from a de bounced push button switch. On every rising edge of the switch the counter will increase by 1 until it reaches a set number which will be user selectable from the 10 toggle switches. Once the count is equal to this number a 100 ns pulse will be outputted to a output pin and the counter will reset and start again. it is basically scaling down a signal to a user defined ratio such as for every 8 pulse output 1 pulse.

I am not after the answer because i wont learn any thing, but rather a bit of a steer in the right direction, i've tried getting my head around some examples of VHDL counters but at this stage it is getting a bit confusing.

Any help would be greatly appreciated.

liam

i think first thing for you is to divide your project into RTL block diagram, for instance a de-bouncer is a block that connected to input switch from one side and it's output
will be connected to counter block, you might need also global ports like clock or reset.
after you defined the entire block diagram ,start implementing each block seperately.
check each block it it works correctly (simulation).
then check your entire suystem (simulation).

 

[djstar]

Thanks for the reply. i think i will take you approach and split it up into different sections. i have had an attempt at making a counter that counts in binary but pre-scales the button press( the standard push switches have been changed for hard de-bounced switches). The circuit works and for every 4 button presses i make it increases the counter by one. do you know how i would go about making the pre scale value user variable with the toggle switches rather than typing in "0011"

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Code VHDL - [expand]
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
 
entity counter is
    port (
        CLK: in std_logic;
        RESET: in std_logic;
        LEDG: out std_logic_vector(7 downto 0)
    );
end counter;
 
architecture Behavioral of counter is
    signal COUNTER: std_logic_vector(7 downto 0) := (others => '0');
    signal PRESCALER: std_logic_vector(3 downto 0);
begin
 
    CounterProcess: process(RESET, CLK)
    begin
        if rising_edge(CLK) then
            if RESET = '0' then
                PRESCALER <= (others => '0');
                COUNTER <= (others => '0');
            else        
                if PRESCALER < "0011" then
                    PRESCALER <= PRESCALER + 1;
                else
                    PRESCALER <= (others => '0');
                    COUNTER <= COUNTER + 1;
                end if;
            end if;
        end if;
    end process;
    
    LEDG <= COUNTER;
 
end Behavioral;

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