use real number in vhdl

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hello all.how can I define 2 bit of signal that the type of it is std_logic_vector (12 downto 0) as decimal?
 

We would prefer a slightly clearer question. What is the relation of decimal <> real number <> 2 bit <> std_logic_vector ???
 

FvM said:
What is the relation of decimal <> real number <> 2 bit <> std_logic_vector ???
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They occur within the same sentence. XD And that's about all the logic cohesion I can detect there, so an alternative version of that question would be helpful yes.
 

how I define 8 exponent bits and 3fraction bits?
 

I want multiply 0.5 with std_logic_vector(or integer) the result is saved and use in another program.i know that real number dont syn.in my search in google I found that std_logic_vector can define fraction bit.but I dont konw how can do it and use it?
 

well, you have 3 fractional bits and 8 integer bits (there are no exponential bits in fixed point).

0.5 = 2^-1, so its the most significant fractional bit.
so in an 11 bit std_logic_vector (why are you using std_logic_vectors to represent numbers??????? ) it would be:

"00000000100"
 
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