well
Junior Member level 1
I have some question about my pwm speech synthesize module.
I write a pwm module use verilog to make speech synthesize,
I test this module on FPGA, I can hear the voice that i want to play.
but there is some high frequence noice in the speech.
can anybody give me some suggestion?
I think there is some problem with my low filter, but I do not know how to change it.
I write a pwm module use verilog to make speech synthesize,
I test this module on FPGA, I can hear the voice that i want to play.
but there is some high frequence noice in the speech.
can anybody give me some suggestion?
I think there is some problem with my low filter, but I do not know how to change it.