[urgent] SDF file annotation problem

[pete_lu]

iopath annotation not enabled

Dear all guys:
I am doing post simulaiton now and meet a problem with SDF.
Compilation had been passed, and when simulation, it reports "VCS runtime internal error".
Actually there are a lot of SDF Errors during compilation. Such as:
1. IOPATH annotation not enabled for module xxx
2. TIMINGCHECK annotation not enabled for module xxx
3. Negative DELAY ignored and replaced by 0.
4. Cannot find timing check.
5. Scaled delay is out of range, setting to 1.
6. Input port xxx in IOPATH not found
...

Most Errors are caused by the simulation models and I think I can just ignore these Errors.
And does anybody meet the same problem? How to solve the problem?
===================================================
Simulatior: VCS
And there are some logs before the failure:
Doing SDF annotation ......
--- Stack trace follows:
#0 0x00000...
#1 0x000x...
...
...
#24 ...
VCS runtime internal error (core dumped)
===================================================

I have one guessing that the SDF Errors don't cause compilation problems, but
when simulation, the Errors exceed the error limitaion of the VCS.
Waiting for answers!! Thanks!

 

[gonewithstone]

scaled delay is out of range

due to the large netlist, the simulation cathe can't dump all the waveform, so you can try to dump part of the waveform, then the problem will be fixed. I have met this same problem. You can refer to VCS manual about $vpdpluson() to dump part of the waveform.

 

[pete_lu]

vcs runtime internal error (core dumped) .

Thank you for your reply.
Actually I didn't dump any waveforms(vpd, vcd, shm, fsdb). I meet the system/vcs virtual memory problem before, and I can sure that is not the cause.
I think the large numbers of compile errors make VCS corrupt during simulation, but I don't know how to ignore it and make the simulation pass. Otherwise I will get the correct verilog timing models to eliminate the compile errors.