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i tried to write anather code for up‐down*counter .....
when i simulate it i got the same value it does not change
module UpDown( reset,up_down,clk,a2g,digits);
It makes no sense to guess about simulation results without seeing the testbench or a complete simulation waveform.
The code as shown has several oddities, e.g. reg [4:0] count can't hold a value of 91. Mixing blocking and non-blocking assignments for the same variable.
The code in a previous, now deleted parallel thread also showed the modules that are missing here.
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