unbuffered Micron DDR2 model

[chipart]

ddr2 model

Hi,

I need to set up a simulation with Micron unbuffered DDR2 SDRAM model.
Can someone tell me how I can tell if a micron part is unbuffered, registered
or fully buffered? This DDR2 would be used along FPGA, so unbuffered seems
to be the one.

Does it matter to simulate unbuffered or registered model for timing analysis
purposes? I assume som timing would be different.

Thanks,

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[sbob]

micron ddr model

Um, of course it makes a difference. Why don't you start by reading the device's datasheet. It's on the same page as the link to the verilog model you found at www.micron.com.