uCOS II interrupt service routine problem

[snishanth512]

I ported uCOS II on ARM cortex M4 based micro-controller.

uCOS II works great.

But when interrupt is used, it goes to lowest priority idle task.

It is not scheduling user defined highest priority task.

I use the following code for servicing interrupt.

void  BSP_IntHandler (CPU_INT16U  src_nbr)
{
    CPU_FNCT_VOID  isr;
    CPU_SR_ALLOC();

    CPU_CRITICAL_ENTER();                                       
    OSIntEnter();
    CPU_CRITICAL_EXIT();

    OSIntExit();                                                
}

 

[ftsolutions]

I assume that you are speaking about software generated interrupt, not a hardware interrupt. Does this happen with HW interrupts as well? Please show how you set the parameters for the high priority user task

 

[snishanth512]

No,its hardware interrupts.

 

[ftsolutions]

Maybe you haven't done a thorough job of porting the code. Are the timers still running? The OS needs the timers to be running (and generating interrupts) to know to switch tasks. If the interrupts aren't properly cleared/re-enabled in the ISR, then simply exiting the ISR and returning to whatever task/function that was on the stack when it was invoked might be the behavior that would result. The NVIC has certain requirements to clear the current interrupt so that following ones will be processed/posted.
This is just a suggestion in where to look, as I cannot see your code.

The Micrium website does have downloadable project ports for ARM Cortex processors of uC/OS-II and III, perhaps you can download those for more hints/clues on where to look for the problem. The site requires one to register an account to download, but it is free of charge.

 

[snishanth512]

I downladed example code micrium website.

And configured code for TM4C123G microcontroller.

The ISR is executed with no errors.

But OS schedules lowest priority task. It does switch to tasks which I created.